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Hardware Requirements

Sizing hardware from parameter count — and understanding which specification actually constrains you.

1. The Two Numbers That Matter

For DeepSpeed training, GPU selection reduces to two quantities, and peak TFLOPS is usually not one of them.

VRAM decides feasibility. If the model states do not fit, no amount of compute helps. This is a hard threshold, not a gradient.

Memory bandwidth decides throughput. Transformer training at realistic batch sizes is largely memory-bandwidth-bound, not compute-bound: the optimizer step is a pure streaming operation with O(1)O(1) arithmetic per parameter, attention is bandwidth-heavy, and MoE models are worse still. A GPU with twice the FLOPS and the same bandwidth rarely trains twice as fast.

Vendor TFLOPS numbers are not comparable as published

Marketing figures mix precisions (FP32 / FP16 / BF16 / FP8), mix dense and sparse (sparse figures are 2× and require 2:4 structured sparsity you almost certainly do not have), and mix accumulate precision (FP16 accumulate is 2× FP32 accumulate on GeForce parts). Consumer-card "FP16 TFLOPS" quoted in comparison tables is frequently the FP32 shader number.

The tables below therefore give VRAM and memory bandwidth — unambiguous, verifiable, and the quantities that actually predict training behaviour. Where FP32 is listed it is labelled as such. For authoritative compute figures consult the vendor datasheet for your exact SKU.

2. GPU Reference

Consumer

GPUVRAMMemory bandwidthFP32 (shader)Notes
RTX 306012 GB360 GB/s12.7 TFMore VRAM than a 3070 — often the better learning card
RTX 30708 GB448 GB/s20.3 TF8 GB is the real constraint
RTX 308010 GB760 GB/s29.8 TF
RTX 309024 GB936 GB/s35.6 TFNo BF16 tensor advantage over 40-series
RTX 407012 GB504 GB/s29.1 TF
RTX 408016 GB717 GB/s48.7 TF
RTX 409024 GB1008 GB/s82.6 TFBest consumer option for training

All Ampere and later consumer cards support BF16, which is what matters most for LLM work — see BF16 over FP16.

Consumer cards and multi-GPU

GeForce cards lack NVLink from the 40-series onward, so inter-GPU communication goes over PCIe — roughly an order of magnitude slower than the NVLink/NVSwitch fabric in datacenter parts.

Since ZeRO Stage 3 costs 3Ψ3\Psi of communication on the critical path, Stage 3 across consumer GPUs is often disappointing. Stage 2 (which costs the same 2Ψ2\Psi as plain DDP) plus LoRA is usually the better configuration on a consumer multi-GPU box.

Datacenter

GPUVRAMMemory bandwidthNotes
A4048 GB GDDR6696 GB/sLarge VRAM, modest bandwidth
A100 40 GB40 GB HBM2e1555 GB/s
A100 80 GB80 GB HBM2e2039 GB/sThe long-standing workhorse
H100 SXM80 GB HBM33350 GB/sAdds FP8
H200 SXM141 GB HBM3e4800 GB/sSame compute as H100, much more memory and bandwidth
B200192 GB HBM3e~8000 GB/sWhat 05_video_speech targets

Note H200 versus H100: identical compute, 1.76× the memory and 1.43× the bandwidth. For memory-bound training that is a large real-world gain even though the FLOPS figure is unchanged — a good illustration of why the compute number is the wrong headline.

3. Memory Estimation

The single most useful formula in this course. For Ψ\Psi trainable parameters:

Mmodel states=2ΨBF16/FP16 weights+2Ψgradients+4Ψ+4Ψ+4ΨFP32 master+m+v=16Ψ bytesM_{\text{model states}} = \underbrace{2\Psi}_{\text{BF16/FP16 weights}} + \underbrace{2\Psi}_{\text{gradients}} + \underbrace{4\Psi + 4\Psi + 4\Psi}_{\text{FP32 master} + m + v} = 16\Psi \text{ bytes}

Derivation and consequences: ZeRO Stages §1.2.

Pure FP32 also comes to 16Ψ16\Psi — for different reasons

Training in FP32 with Adam gives 4Ψ4\Psi (weights) +4Ψ+ 4\Psi (gradients) +4Ψ+ 4\Psi (mm) +4Ψ+ 4\Psi (vv) =16Ψ= 16\Psi as well.

The totals coincide; the breakdowns do not. Mixed precision moves memory from weights and gradients into the FP32 master copy, and its benefit is speed (tensor cores) and halved activation memory, not smaller model states. Quoting "16Ψ16\Psi" is safe either way, but do not conclude that mixed precision reduces model-state memory — it does not.

OptimizerKKTotal
Adam / AdamW1216Ψ16\Psi
8-bit Adam~610Ψ10\Psi
SGD + momentum48Ψ8\Psi
SGD04Ψ4\Psi
LoRA (frozen base)12 on adapters only2Ψbase+16ΨLoRA2\Psi_{\text{base}} + 16\Psi_{\text{LoRA}}

Worked examples

ModelΨ\PsiFull FT (16Ψ16\Psi)LoRA (2Ψ\approx 2\Psi)
Qwen3-0.6B0.6B9.6 GB1.2 GB
Qwen2-VL-2B2B32 GB4 GB
Mistral-7B7B112 GB14 GB
gpt-oss-20b20B320 GB40 GB
Llama-70B70B1.12 TB140 GB
LongCat-Flash-Omni560B8.96 TB1.12 TB

Then add activations, which scale with batch and sequence length and are frequently the binding constraint — especially for CNNs and vision-language models. Budget 20–50% headroom beyond the table.

With ZeRO

StageMemory per GPUCommunication
14Ψ+12Ψ/Nd4\Psi + 12\Psi/N_d2Ψ2\Psi — free
22Ψ+14Ψ/Nd2\Psi + 14\Psi/N_d2Ψ2\Psi — free
316Ψ/Nd16\Psi/N_d3Ψ3\Psi — 1.5×

4. Model → Hardware

Trainable Ψ\PsiApproachExample hardware
< 1BFull FT, ZeRO-21× RTX 3060 (12 GB)
1–3BFull FT ZeRO-2, or LoRA1× RTX 4090 (24 GB)
3–7BLoRA + ZeRO-21× RTX 4090, or 2× for headroom
7–13BLoRA + ZeRO-22× RTX 4090 / 1× A100 80 GB
13–30BLoRA + ZeRO-2/34× A100 80 GB
30–70BLoRA + ZeRO-3, offload8× A100 / 4× H100
70B+LoRA + ZeRO-3 + CPU/NVMe offload8× H100/H200, large host RAM
500B+LoRA + ZeRO-3 + aggressive offloadSee 05_video_speech — 2× B200 and 3 TB RAM

5. This Course's Examples

ExampleModelMinimumRecommended
0104 basics< 1M params1× RTX 3060Any CUDA GPU
02_intermediate/02_rnn_stock_data~5K params1× any GPU2× for the demo
03_huggingface/02_trl_sftQwen3-0.6B1× RTX 3070 (8 GB)2× RTX 4090
03_huggingface/03_ocrQwen2-VL-2B2× 16 GB with LoRA2× RTX 4090
03_huggingface/06_grpoQwen-1.5B1× 8 GB + 64 GB RAM1× RTX 4090
07_..._gpt_ossgpt-oss-20b4× A100 80 GB4× H100
07_..._multi_agencyQwen-1.5B1× RTX 4090
04_video_text LLaVALLaVA 7B2× A100 40 GB2× A100 80 GB
04_video_text seq2seqNLLB-600M1× RTX 30901× A100
05_video_speechLongCat 560B2× B200 + 3 TB RAM + 2 TB disk8× B200
05_video_speech is gated on host RAM, not GPUs

The example's run_2xB200.sh preflights GPU count, free disk, and total RAM, and it is the 3 TB of system RAM that makes the run possible — 1.12 TB of BF16 weights live in host memory and stream to the GPUs. Two B200s alone are not sufficient. Under-provisioned RAM does not degrade gracefully; the host swaps and throughput effectively stops. See Video-Speech Training.

6. System Requirements

Host RAM

CPU offload needs 12Ψ\approx 12\Psi bytes for Adam states, plus room for the dataloader and OS.

ConfigurationHost RAM
Basic examples16 GB
HuggingFace, no offload32 GB
7B with optimizer offload128 GB
70B with offload1 TB+
05_video_speech (560B)3 TB

A useful rule: with offload enabled, provision host RAM at 1.5–2× the theoretical requirement. Pinned memory is non-swappable and fragments, so the practical ceiling is below the nominal total.

Storage

UseSpace
Basic examples50 GB
HuggingFace models100–200 GB
70B weights~140 GB (BF16)
LongCat-Flash-Omni~1.1 TB

Point HF_HOME at the large volume. On HPC clusters $HOME is usually a small NFS quota, and a 1.1 TB download into it will fail — slowly.

NVMe offload requires local NVMe. nvme_path on a network filesystem is catastrophically slow and is the single most common ZeRO-Infinity misconfiguration.

Interconnect

SetupInterconnectSuitable for
Single GPUEverything up to its VRAM
Multi-GPU, PCIe~32–64 GB/sZeRO-2 comfortably; Stage 3 marginally
Multi-GPU, NVLink300–900 GB/sStage 3, tensor parallelism
Multi-node, 25 GbE3 GB/sMinimum viable; expect comm-bound
Multi-node, 100+ Gb InfiniBand12.5+ GB/sProduction multi-node

Interconnect quality is what decides whether Stage 3 is usable. Sizing it from the 3Ψ3\Psi figure is the analysis in §4 of the ZeRO page.

7. Cost

Pricing moves constantly

The figures below are order-of-magnitude only, and were indicative when written. Always check current provider pricing — spot and preemptible rates in particular move weekly.

ProviderGPUApprox. $/hr
RunPod (community)RTX 4090~$0.70
RunPodA100 80 GB~$1.90
CoreWeaveH100~$4.75
AWSp4d.24xlarge (8× A100)~$32.80

Practical guidance:

  1. Develop on the smallest GPU that runs the code. Debug a shape mismatch on a 4090, not on eight H100s.
  2. Use the small-model variant first. train_ds_mistral7b.py exercises the same code path as the 20B script at a fraction of the cost.
  3. Prefer spot/preemptible for experimentation — and checkpoint frequently enough that preemption costs minutes, not hours.
  4. Size for throughput, not just fit. A configuration that barely fits with heavy offload can be slower and more expensive overall than one on a larger GPU that runs unencumbered. Cost is $/hr × hours.
  5. Watch the download. 1.1 TB of weights takes hours; on metered egress it may cost more than the compute.

Next Steps

References

  1. Rajbhandari, S., Rasley, J., Ruwase, O., & He, Y. (2020). ZeRO. SC '20. arXiv:1910.02054 — the 16Ψ16\Psi accounting.
  2. Micikevicius, P., et al. (2018). Mixed Precision Training. ICLR 2018. arXiv:1710.03740
  3. Dettmers, T., Lewis, M., Shleifer, S., & Zettlemoyer, L. (2022). 8-bit Optimizers via Block-wise Quantization. ICLR 2022. arXiv:2110.02861
  4. Hu, E. J., et al. (2022). LoRA. ICLR 2022. arXiv:2106.09685
  5. NVIDIA A100 datasheet · NVIDIA data center GPU specs